The invention relates to the field of designing integrated circuits (ICs).
It is generally desirable to reduce the power consumed by an IC without sacrificing its performance. There are many techniques for achieving power savings in an IC. Examples of such techniques include back-biasing, clock gating, using multi-threshold voltage devices, powering down unused circuitry, and reducing the toggle rate. Using multi-threshold voltage devices involves using higher performance devices on critical paths and power efficient devices on non-critical paths. Some of these techniques, such as for example using multi-threshold voltage devices, affect the design of the IC. Such techniques that affect the design of the IC also affect the design of the mask layers used for fabricating the IC. The mask layers are designed and created in response to the design specifications, including those dictated by the power savings techniques. As a result, such power saving techniques are subject to non-recurring engineering (NRE) costs, which may be significant in the case of designing mask layers. Also, in some of these design techniques, the choices made regarding power savings are “fixed” once the IC design is completed. To be “unfixed,” the IC must be redesigned which may involve significant costs depending on when the redesign is made. For example, the costs would be significant if the redesign is made after the mask layers for the “fixed” IC design are prepared.